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 ISP1123
Universal Serial Bus compound hub
Rev. 01 -- 5 October 1999 Preliminary specification
1. General description
The ISP1123 is a compound Universal Serial Bus (USB) hub device which complies with USB Specification Rev. 1.1. It integrates a Serial Interface Engine (SIE), hub repeater, hub controller, USB data transceivers and a 3.3 V voltage regulator. It has a configurable number of downstream ports, ranging from 2 to 5, with one port dedicated to an embedded or non-removable function. The ISP1123 can be bus-powered, self-powered or hybrid-powered. When it is hybrid-powered the hub functions are powered by the upstream power supply (VBUS), but the downstream ports are powered by an external 5 Volt supply. The low power consumption in `suspend' mode allows easy design of equipment that is compliant with the ACPITM, OnNowTM and USB power management requirements. The ISP1123 has built-in overcurrent sense inputs, supporting individual and ganged mode overcurrent protection for downstream ports. All ports (including the hub) have GoodLinkTM indicator outputs for easy visual monitoring of USB traffic. The ISP1123 has a serial I2C-bus interface for external EEPROM access and a reduced frequency (6 MHz) crystal oscillator. These features allow significant cost savings in system design and easy implementation of advanced USB functionality into PC peripherals.
2. Features
c
c
s High performance USB hub device with integrated hub repeater, hub controller, Serial Interface Engine (SIE), data transceivers and 3.3 V voltage regulator s Complies with Universal Serial Bus Specification Rev. 1.1 and ACPI, OnNow and USB power management requirements s Downstream port 1 dedicated to a non-removable function, correctly reported in the related descriptors s Configurable from 2 to 5 downstream ports with automatic speed detection s Internal power-on reset and low voltage reset circuit s Supports bus-powered, hybrid-powered and self-powered application s Individual or global power switching for downstream ports s Individual or ganged port overcurrent protection with built-in sense circuits s 6 MHz crystal oscillator with on-chip PLL for low EMI s Visual USB traffic monitoring (GoodLinkTM) for hub and downstream ports s I2C-bus interface to read vendor ID, product ID and configuration bits from external EEPROM
Philips Semiconductors
ISP1123
USB compound hub
s s s s s
Operation over the extended USB bus voltage range (4.0 to 5.5 V) Operating temperature range -40 to +85 C 8 kV in-circuit ESD protection for lower cost of external components Full-scan design with high test coverage Available in 32-pin SDIP, SO and LQFP packages.
3. Ordering information
Table 1: Ordering information Package Name ISP1123D ISP1123NB ISP1123BD [1]
[1]
Type number
Description plastic small outline package; 32 leads; body width 7.5 mm plastic shrink dual in-line package; 32 leads (400 mil) plastic low profile quad flat package; 32 leads; body 7 x 7 x 1.4 mm
Version SOT287-1 SOT232-1 SOT358-1
SO32 SDIP32 LQFP32
For the availability of the LQFP32 package please contact your local Philips Semiconductors sales office.
4. Block diagram
upstream port VCC 5V SUPPLY REGULATOR 3.3 V full speed ANALOG Tx / Rx HUB GoodLink Vreg(3.3) D+ D- LED
6 MHz
PLL BIT CLOCK RECOVERY PHILIPS SIE
PACKET GENERATOR
I2C-BUS INTERFACE
SDA SCL
ISP1123
INDV HUB CONTROLLER OPTION
HUB REPEATER
END OF FRAME TIMERS
GENERAL PORT CONTROLLER
ANALOG Tx /Rx
GoodLink/ POWER SWITCH/ OC DETECT
ANALOG Tx/ Rx
GoodLink/ POWER SWITCH/ OC DETECT
ANALOG Tx/ Rx
GoodLink/ POWER SWITCH/ OC DETECT
ANALOG Tx / Rx
GoodLink/ POWER SWITCH/ OC DETECT
ANALOG Tx / Rx
GoodLink/ POWER SWITCH/ OC DETECT
self/bus powered
D+
LED/ D- overcurrent D+ detection power switch
LED/ D- overcurrent D+ detection power switch downstream port 2 (removable)
LED/ D- overcurrent D+ detection power switch downstream port 3 (removable)
LED/ D- overcurrent D+ detection power switch downstream port 4 (removable)
LED/ D- overcurrent detection power switch downstream port 5 (removable)
downstream port 1: embedded or non-removable function
MBL083
This is a conceptual block diagram and does not include each individual signal.
Fig 1. Block diagram of the ISP1123.
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Preliminary specification
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ISP1123
USB compound hub
5. Functional diagram
host
handbook, halfpage
port 0 USB DEVICE (e.g. keyboard)
(1)
port 1
ISP1123
ports 2 to 5
compound hub box
MBL082
removable external devices
(1) Downstream port 1 is non-removable.
Fig 2. A compound hub box using ISP1123.
6. Pinning information
6.1 ISP1123D (SO32) and ISP1123NB (SDIP32)
6.1.1 Pinning
handbook, halfpage
Vreg(3.3) 1
handbook, halfpage
32 PSW1/GL1 31 DP2 30 DM2 29 DP0 28 DM0 27 DP1 26 DM1 25 DP5
Vreg(3.3) 1
32 PSW1/GL1 31 DP2 30 DM2 29 DP0 28 DM0 27 DP1 26 DM1 25 DP5
PSW2/GL2 2 GND 3 DM3 4 DP3 5 VCC 6 OC1 7 OC2 8
PSW2/GL2 2 GND 3 DM3 4 DP3 5 VCC 6 OC1 7 OC2 8
ISP1123D
OC3 9 OC4 10 OC5/GOC 11 DM4 12 DP4 13 SP/BP 14 HUBGL 15 PSW3/GL3 16
MBL076
ISP1123NB
24 DM5 23 INDV/SDA 22 OPTION/SCL 21 RESET 20 XTAL2 19 XTAL1 18 PSW5/GL5/GPSW 17 PSW4/GL4 OC3 9 OC4 10 OC5/GOC 11 DM4 12 DP4 13 SP/BP 14 HUBGL 15 PSW3/GL3 16
MBL077
24 DM5 23 INDV/SDA 22 OPTION/SCL 21 RESET 20 XTAL2 19 XTAL1 18 PSW5/GL5/GPSW 17 PSW4/GL4
Fig 3. Pin configuration SO32.
Fig 4. Pin configuration SDIP32.
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USB compound hub
6.1.2
Pin description
Table 2: Vreg(3.3) [2] PSW2/GL2 [3] Pin description for SO32 and SDIP32 Pin 1 2 Type O Description regulated supply voltage (3.3 V 10%) from internal regulator; used to connect pull-up resistor on DP0 line modes 4 to 6: power switch control output for downstream port 2 (open-drain, 6 mA) modes 0 to 3, 7: GoodLink LED indicator output for downstream port 2 (open-drain, 6 mA); to connect an LED use a 330 series resistor GND DM3 DP3 VCC OC1 OC2 OC3 OC4 OC5/GOC [3] 3 4 5 6 7 8 9 10 11 AI/O AI/O AI/I AI/I AI/I AI/I AI/I ground supply downstream port 3 D- connection (analog) [4] downstream port 3 D+ connection (analog) [4] supply voltage; connect to USB supply VBUS (bus-powered or hybrid-powered) or to local supply VDD (self-powered) overcurrent sense input for downstream port 1 (analog [5]) overcurrent sense input for downstream port 2 (analog [5]) overcurrent sense input for downstream port 3 (analog [5]) overcurrent sense input for downstream port 4 (analog [5]) modes 5, 7: overcurrent sense input for downstream port 5 (analog [5]) modes 0, 1, 3: global overcurrent sense input (analog [5]) DM4 DP4 SP/BP 12 13 14 AI/O AI/O I downstream port 4 D- connection (analog) [4] downstream port 4 D+ connection (analog) [4] selects power mode: self-powered: connect to VDD (local power supply); also use this mode for hybrid-powered operation bus-powered: connect to GND; disable downstream port 5 to meet supply current requirements [4] HUBGL 15 O hub GoodLink LED indicator output (open-drain, 6 mA); to connect an LED use a 330 series resistor; if unused connect to VCC via a 10 k resistor modes 4 to 6: power switch control output for downstream port 3 (open-drain, 6 mA) modes 0 to 3, 7: GoodLink LED indicator output for downstream port 3 (open-drain, 6 mA); to connect an LED use a 330 series resistor PSW4/GL4 [3] 17 O modes 4 to 6: power switch control output for downstream port 4 (open-drain, 6 mA) modes 0 to 3, 7: GoodLink LED indicator output for downstream port 4 (open-drain, 6 mA); to connect an LED use a 330 series resistor
Symbol [1]
PSW3/GL3 [3]
16
O
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Preliminary specification
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ISP1123
USB compound hub
Pin description for SO32 and SDIP32...continued Pin 18 Type O Description mode 5: power switch control output for downstream port 5 (open-drain, 6 mA) modes 3, 7: GoodLink LED indicator output for downstream port 5 (open-drain, 6 mA); to connect an LED use a 330 series resistor modes 0 to 2: gang mode power switch control output (open-drain, 6 mA)
Table 2:
Symbol [1] PSW5/GL5/ GPSW [3]
XTAL1 XTAL2 RESET [2]
19 20 21
I O I
crystal oscillator input (6 MHz) crystal oscillator output (6 MHz) reset input (Schmitt trigger); a LOW level produces an asynchronous reset; connect to VCC for power-on reset (internal POR circuit) mode selection input; also functions as I2C-bus clock output (open-drain, 6 mA) selects individual (HIGH) or global (LOW) power switching and overcurrent detection; also functions as bidirectional I2C-bus data line (open-drain, 6 mA) downstream port 5 D- connection (analog) [4] downstream port 5 D+ connection (analog) [4] downstream port 1 D- connection (analog) [6] downstream port 1 D+ connection (analog) [6] upstream port D- connection (analog) upstream port D+ connection (analog) downstream port 2 D- connection (analog) [6] downstream port 2 D+ connection (analog) [6] modes 4 to 6: power switch control output for downstream port 1 (open-drain, 6 mA) modes 0 to 3, 7: GoodLink LED indicator output for downstream port 1 (open-drain, 6 mA); to connect an LED use a 330 series resistor
OPTION/SCL INDV/SDA
22 23
I/O I/O
DM5 DP5 DM1 DP1 DM0 DP0 DM2 DP2 PSW1/GL1 [3]
24 25 26 27 28 29 30 31 32
AI/O AI/O AI/O AI/O AI/O AI/O AI/O AI/O O
[1] [2] [3] [4] [5] [6]
Symbol names with an overscore (e.g. NAME) indicate active LOW signals. The voltage at pin Vreg(3.3) is gated by the RESET pin. This allows fully self-powered operation by connecting RESET to VBUS (+5 V USB supply). If VBUS is lost upstream port D+ will not be driven. See Table 4 "Mode selection". To disable a downstream port connect both D+ and D- to VCC via a 1 M resistor; unused ports must be disabled in reverse order starting from port 5. Analog detection circuit can be switched off using an external EEPROM, see Table 23; in this case, the pin functions as a logic input (TTL level). Downstream ports 1 and 2 cannot be disabled.
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ISP1123
USB compound hub
6.2 ISP1123BD (LQFP32)
6.2.1 Pinning
30 PSW2/GL2
29 Vreg(3.3)
handbook, full pagewidth
28 PSW1/GL1
31 GND
32 DM3
26 DM2
27 DP2
25 DP0
DP3 1 VCC 2 OC1 3 OC2 4
24 DM0 23 DP1 22 DM1 21 DP5
ISP1123BD
OC3 5 OC4 6 OC5/GOC 7 DM4 8 20 DM5 19 INDV/SDA 18 OPTION/SCL 17 RESET
SP/BP 10
HUBGL 11
PSW3/GL3 12
PSW4/GL4 13
PSW5/GL5/GPSW 14
XTAL1 15
XTAL2 16
9
MBL078
Fig 5. Pin configuration LQFP32.
6.2.2
Pin description
Table 3: Vreg(3.3)
[2]
Pin description for LQFP32 Pin 29 30 Type O Description regulated supply voltage (3.3 V 10%) from internal regulator; used to connect pull-up resistor on DP0 line modes 4 to 6: power switch control output for downstream port 2 (open-drain, 6 mA) modes 0 to 3, 7: GoodLink LED indicator output for downstream port 2 (open-drain, 6 mA); to connect an LED use a 330 series resistor
Symbol [1]
PSW2/GL2 [3]
GND DM3 DP3 VCC OC1 OC2 OC3 OC4
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DP4
31 32 1 2 3 4 5 6
AI/O AI/O AI/I AI/I AI/I AI/I
ground supply downstream port 3 D- connection (analog) [4] downstream port 3 D+ connection (analog) [4] supply voltage; connect to USB supply VBUS (bus-powered or hybrid-powered) or to local supply VDD (self-powered) overcurrent sense input for downstream port 1 (analog [5]) overcurrent sense input for downstream port 2 (analog [5]) overcurrent sense input for downstream port 3 (analog [5]) overcurrent sense input for downstream port 4 (analog [5])
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Preliminary specification
Rev. 01 -- 5 October 1999
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ISP1123
USB compound hub
Pin description for LQFP32...continued Pin 7 Type AI/I Description modes 5, 7: overcurrent sense input for downstream port 5 (analog [5]) modes 0, 1, 3: global overcurrent sense input (analog [5]) downstream port 4 D- connection (analog) [4] downstream port 4 D+ connection (analog) [4] selects power mode: self-powered: connect to VDD (local power supply); also use this mode for hybrid-powered operation bus-powered: connect to GND; disable downstream port 5 to meet supply current requirements [4]
Table 3:
Symbol [1] OC5/GOC [3]
DM4 DP4 SP/BP
8 9 10
AI/O AI/O I
HUBGL
11
O
hub GoodLink LED indicator output (open-drain, 6 mA); to connect an LED use a 330 series resistor; if unused connect to VCC via a 10 k resistor modes 4 to 6: power switch control output for downstream port 3 (open-drain, 6 mA) modes 0 to 3, 7: GoodLink LED indicator output for downstream port 3 (open-drain, 6 mA); to connect an LED use a 330 series resistor
PSW3/GL3 [3]
12
O
PSW4/GL4 [3]
13
O
modes 4 to 6: power switch control output for downstream port 4 (open-drain, 6 mA) modes 0 to 3, 7: GoodLink LED indicator output for downstream port 4 (open-drain, 6 mA); to connect an LED use a 330 series resistor
PSW5/GL5/ GPSW [3]
14
O
mode 5: power switch control output for downstream port 5 (open-drain, 6 mA) modes 3, 7: GoodLink LED indicator output for downstream port 5 (open-drain, 6 mA); to connect an LED use a 330 series resistor modes 0 to 2: gang mode power switch control output (open-drain, 6 mA)
XTAL1 XTAL2 RESET [2]
15 16 17
I O I
crystal oscillator input (6 MHz) crystal oscillator output (6 MHz) reset input (Schmitt trigger); a LOW level produces an asynchronous reset; connect to VCC for power-on reset (internal POR circuit) mode selection input; also functions as I2C-bus clock output (open-drain, 6 mA) selects individual (HIGH) or global (LOW) power switching and overcurrent detection; also functions as bidirectional I2C-bus data line (open-drain, 6 mA) downstream port 5 D- connection (analog) [4] downstream port 5 D+ connection (analog) [4] downstream port 1 D- connection (analog) [6] downstream port 1 D+ connection (analog) [6] upstream port D- connection (analog) upstream port D+ connection (analog)
(c) Philips Electronics N.V. 1999. All rights reserved.
OPTION/SCL INDV/SDA
18 19
I/O I/O
DM5 DP5 DM1 DP1 DM0 DP0
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20 21 22 23 24 25
AI/O AI/O AI/O AI/O AI/O AI/O
Preliminary specification
Rev. 01 -- 5 October 1999
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ISP1123
USB compound hub
Pin description for LQFP32...continued Pin 26 27 28 Type AI/O AI/O O Description downstream port 2 D- connection (analog) [6] downstream port 2 D+ connection (analog) [6] modes 4 to 6: power switch control output for downstream port 1 (open-drain, 6 mA) modes 0 to 3, 7: GoodLink LED indicator output for downstream port 1 (open-drain, 6 mA); to connect an LED use a 330 series resistor
Table 3: DM2 DP2
Symbol [1]
PSW1/GL1 [3]
[1] [2] [3] [4] [5] [6]
Symbol names with an overscore (e.g. NAME) indicate active LOW signals. The voltage at pin Vreg(3.3) is gated by the RESET pin. This allows fully self-powered operation by connecting RESET to VBUS (+5 V USB supply). If VBUS is lost upstream port D+ will not be driven. See Table 4 "Mode selection". To disable a downstream port connect both D+ and D- to VCC via a 1 M resistor; unused ports must be disabled in reverse order starting from port 5. Analog detection circuit can be switched off using an external EEPROM, see Table 23; in this case, the pin functions as a logic input (TTL level). Downstream ports 1 and 2 cannot be disabled.
7. Functional description
The ISP1123 is a compound USB hub with up to 5 downstream ports. The number of ports can be configured between 2 and 5. The downstream ports can be used to connect low-speed or full-speed USB peripherals. Downstream port 1 is dedicated to an embedded or non-removable function, the other ports are removable. All standard USB requests from the host are handled by the hardware without the need for firmware intervention. The block diagram is shown in Figure 1 and the basic architecture of a compound hub in Figure 2. The ISP1123 requires only a single supply voltage. An internal 3.3 V regulator provides the supply voltage for the analog USB data transceivers. The ISP1123 supports both bus-powered and self-powered hub operation. When using bus-powered operation a downstream port cannot supply more than 100 mA to a peripheral. In case of self-powered operation an external supply is used to power the downstream ports, allowing a current consumption of max. 500 mA per port. A basic I2C-bus interface is provided for reading vendor ID, product ID and configuration bits from an external EEPROM upon a reset.
7.1 Analog transceivers
The integrated transceiver interfaces directly to the USB cables through external termination resistors. They are capable of transmitting and receiving serial data at both `full-speed' (12 Mbit/s) and `low-speed' (1.5 Mbit/s) data rates. The slew rates are adjusted according to the speed of the device connected and lie within the range mentioned in the USB Specification Rev. 1.1.
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7.2 Philips Serial Interface Engine (SIE)
The Philips SIE implements the full USB protocol layer. It is completely hardwired for speed and needs no firmware intervention. The functions of this block include: synchronization pattern recognition, parallel/serial conversion, bit (de-)stuffing, CRC checking/generation, Packet IDentifier (PID) verification/generation, address recognition, handshake evaluation/generation.
7.3 Hub repeater
The hub repeater is responsible for managing connectivity on a `per packet' basis. It implements `packet signalling' and `resume' connectivity. Low-speed devices can be connected to downstream ports. If a low-speed device is detected the repeater will not propagate upstream packets to the corresponding port, unless they are preceded by a PREAMBLE PID.
7.4 End-of-frame timers
This block contains the specified EOF1 and EOF2 timers which are used to detect `loss-of-activity' and `babble' error conditions in the hub repeater. The timers also maintain the low-speed keep-alive strobe which is sent at the beginning of a frame.
7.5 General and individual port controller
The general and individual port controllers together provide status and control of individual downstream ports. Any port status change will be reported to the host via the hub status change (interrupt) endpoint.
7.6 GoodLink
Indication of a good USB connection is provided through GoodLink technology. An LED can be directly connected via an external 330 resistor. During enumeration the LED blinks on momentarily. After successful configuration of the ISP1123, the LED is permanently on. The LED blinks off for 100 ms upon each successful packet transfer (with ACK). The hub GoodLink indicator blinks when the hub receives a packet addressed to it. Downstream GoodLink indicators blink upon an acknowledgment from the associated port. In `suspend' mode the LED is off. This feature provides a user-friendly indication of the status of the hub, the connected downstream devices and the USB traffic. It is a useful diagnostics tool to isolate faulty USB equipment and helps to reduce field support and hotline costs.
7.7 Bit clock recovery
The bit clock recovery circuit recovers the clock from the incoming USB data stream using a 4x oversampling principle. It is able to track jitter and frequency drift as specified by the USB Specification Rev. 1.1.
7.8 Voltage regulator
A 5 to 3.3 V DC-DC regulator is integrated on-chip to supply the analog transceiver and internal logic. This can also be used to supply the terminal 1.5 k pull-up resistor on the D+ line of the upstream connection.
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7.9 PLL clock multiplier
A 6 to 48 MHz clock multiplier Phase-Locked Loop (PLL) is integrated on-chip. This allows for the use of low-cost 6 MHz crystals. The low crystal frequency also minimizes Electro-Magnetic Interference (EMI). The PLL requires no external components.
7.10 Overcurrent detection
An overcurrent detection circuit for downstream ports has been integrated on-chip. It is self-reporting, resets automatically, has a low trip time and requires no external components. Both individual and ganged mode overcurrent detection are supported.
7.11 I2C-bus interface
A basic serial I2C-bus interface (single master, 100 kHz) is provided to read VID, PID and configuration bits from an external I2C-bus EEPROM (e.g. Philips PCF8582 or equivalent). At reset the ISP1123 reads 6 bytes of data from the external memory. The I2C-bus interface timing complies with the standard mode of operation as described in The I2C-bus and how to use it, order number 9398 393 40011.
8. Modes of operation
The ISP1123 has several modes of operation, each corresponding with a different pin configuration. Modes are selected by means of pins INDV, OPTION and SP/BP, as shown in Table 4.
Table 4: Mode 0 1 2 3 4 5 6 7 Mode selection INDV
[1]
OPTION SP/BP
[2]
PSWn/GLn (n = 1 to 4) GoodLink GoodLink GoodLink GoodLink [4] individual power individual power individual power GoodLink [4]
PSW5/GL5/GPSW OCn (n = 1 to 4) ganged power ganged power ganged power GoodLink [4] inactive individual power inactive GoodLink [4] inactive inactive inactive [3] inactive individual overcurrent individual overcurrent inactive [3] individual overcurrent
OC5/GOC global overcurrent global overcurrent inactive [3] global overcurrent inactive individual overcurrent inactive [3] individual overcurrent
0 0 0 0 1 1 1 1
0 0 1 1 0 0 1 1
0 1 0 1 0 1 0 1
[1] [2] [3] [4]
Port power switching: logic 0 = ganged, logic 1 = individual. Power mode: logic 0 = bus-powered, logic 1 = self-powered (or hybrid-powered). No overcurrent detection. No power switching.
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9. Endpoint descriptions
Each USB device is logically composed of several independent endpoints. An endpoint acts as a terminus of a communication flow between the host and the device. At design time each endpoint is assigned a unique number (endpoint identifier, see Table 5). The combination of the device address (given by the host during enumeration), the endpoint number and the transfer direction allows each endpoint to be uniquely referenced. The ISP1123 has two endpoints, endpoint 0 (control) and endpoint 1 (interrupt).
Table 5: Function Hub endpoints Ports Endpoint identifier 0 1 Transfer type control interrupt Direction [1] Max. packet size (bytes) OUT IN IN 64 64 1
Hub
0: upstream 1 to 5: downstream
[1]
IN: input for the USB host; OUT: output from the USB host.
9.1 Hub endpoint 0 (control)
All USB devices and functions must implement a default control endpoint (ID = 0). This endpoint is used by the host to configure the device and to perform generic USB status and control access. The ISP1123 hub supports the following USB descriptor information through its control endpoint 0, which can handle transfers of 64 bytes maximum:
* * * * * *
Device descriptor Configuration descriptor Interface descriptor Endpoint descriptor Hub descriptor String descriptor.
9.2 Hub endpoint 1 (interrupt)
Endpoint 1 is used by the ISP1123 hub to provide status change information to the host. This endpoint can be accessed only after the hub has been configured by the host (by sending the Set Configuration command). Endpoint 1 is an interrupt endpoint: the host polls it once every 255 ms by sending an IN token. If the hub has detected no change in the port status it returns a NAK (Not AcKnowledge) response to this request, otherwise it sends the Status Change byte (see Table 6).
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Status Change byte: bit allocation Description a logic 1 indicates a status change on the hub's upstream port a logic 1 indicates a status change on downstream port 1 a logic 1 indicates a status change on downstream port 2 a logic 1 indicates a status change on downstream port 3 a logic 1 indicates a status change on downstream port 4 a logic 1 indicates a status change on downstream port 5 not used not used
Table 6: Bit 0 1 2 3 4 5 6 7
Symbol Hub SC Port 1 SC Port 2 SC Port 3 SC Port 4 SC Port 5 SC reserved reserved
10. Host requests
The ISP1123 handles all standard USB requests from the host via control endpoint 0. The control endpoint can handle a maximum of 64 bytes per transfer. Remark: Please note that the USB data transmission order is Least Significant Bit (LSB) first. In the following tables multi-byte variables are displayed least significant byte first.
10.1 Standard requests
Table 7 shows the supported standard USB requests. Some requests are explicitly unsupported. All other requests will be responded with a STALL packet.
Table 7: Standard USB requests bmRequestType byte 0 [7:0] (Bin) X000 0000 1000 0000 X000 0000 X000 0000 1000 0000 bRequest byte 1 (Hex) 05 08 09 09 06 wValue byte 2, 3 (Hex) address [1] 00, 00 00, 00 01, 00 00, 02 wIndex byte 4, 5 (Hex) 00, 00 00, 00 00, 00 00, 00 00, 00 wLength byte 6, 7 (Hex) 00, 00 01, 00 00, 00 00, 00 length [2] Data
Request name
Address Set Address Configuration Get Configuration Set Configuration (0) Set Configuration (1) Descriptor Get Configuration Descriptor configuration, interface and endpoint descriptors device descriptor language ID string manufacturer string product string configuration value = 01H none none none
Get Device Descriptor Get String Descriptor (0) Get String Descriptor (1) Get String Descriptor (2)
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1000 0000 1000 0000 1000 0000 1000 0000
06 06 06 06
00, 01 03, 00 03, 01 03, 02
00, 00 00, 00 00, 00 00, 00
length [2] length [2] length [2] length [2]
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Table 7:
Standard USB requests...continued bmRequestType byte 0 [7:0] (Bin) X000 0000 X000 0010 X000 0000 X000 0010 bRequest byte 1 (Hex) 01 01 03 03 wValue byte 2, 3 (Hex) 01, 00 00, 00 01, 00 00, 00 wIndex byte 4, 5 (Hex) 00, 00 81, 00 00, 00 81, 00 wLength byte 6, 7 (Hex) 00, 00 00, 00 00, 00 00, 00 Data
Request name
Feature Clear Device Feature (REMOTE_WAKEUP) Clear Endpoint (1) Feature (HALT/STALL) Set Device Feature (REMOTE_WAKEUP) Set Endpoint (1) Feature (HALT/STALL) Status Get Device Status Get Interface Status Get Endpoint (0) Status Get Endpoint (1) Status Unsupported Set Descriptor Get Interface Set Interface Synch Frame
[1] [2] [3]
none none none none
1000 0000 1000 0001 1000 0010 1000 0010
00 00 00 00
00, 00 00, 00 00, 00 00, 00
00, 00 00, 00 00/80 [3], 00 81, 00
02, 00 02, 00 02, 00 02, 00
device status zero endpoint 0 status endpoint 1 status descriptor; STALL STALL STALL STALL
0000 0000 1000 0001 X000 0001 1000 0010
07 0A 0B 0C
XX, XX 00, 00 XX, XX 00, 00
XX, XX XX, XX XX, XX XX, XX
XX, XX 01, 00 00, 00 02, 00
Device address: 0 to 127. Returned value in bytes. MSB specifies endpoint direction: 0 = OUT, 1 = IN. The ISP1123 accepts either value.
10.2 Hub specific requests
In Table 8 the supported hub specific requests are listed, as well as some unsupported requests. Table 9 provides the feature selectors for setting or clearing port features.
Table 8: Hub specific requests bmRequestType byte 0 [7:0] (Bin) 1010 0000 X010 0000 X010 0011 X010 0011 bRequest byte 1 (Hex) 06 01 01 03 wValue byte 2, 3 (Hex) 00, 00/29 [1] 00, 00 wIndex byte 4, 5 (Hex) 00, 00 00, 00 wLength byte 6, 7 (Hex) length [2], 00 00, 00 00, 00 00, 00 Data
Request name
Descriptor Get Hub Descriptor Feature Clear Hub Feature (C_LOCAL_POWER) Clear Port Feature (feature selectors) Set Port Feature (feature selectors)
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feature [3], 00 port [4], 00 feature [3], 00 port [4], 00
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Table 8:
Hub specific requests...continued bmRequestType byte 0 [7:0] (Bin) 1010 0000 bRequest byte 1 (Hex) 00 wValue byte 2, 3 (Hex) 00, 00 wIndex byte 4, 5 (Hex) 00, 00 wLength byte 6, 7 (Hex) 04, 00 Data
Request name
Status Get Hub Status hub status and status change field port status STALL STALL STALL STALL STALL
Get Port Status Unsupported Get Bus Status Clear Hub Feature (C_OVER_CURRENT) Set Hub Descriptor Set Hub Feature (C_LOCAL_POWER) Set Hub Feature (C_OVER_CURRENT)
[1] [2] [3] [4]
1010 0011 1010 0011 X010 0000 0010 0000 X010 0000 X010 0000
00 02 01 07 03 03
00, 00 00, 00 01, 00 XX, XX 00, 00 01, 00
port [4], 00 port [4], 00 00, 00 00, 00 00, 00 00, 00
04, 00 01, 00 00, 00 3E, 00 00, 00 00, 00
USB Specification Rev. 1.0 uses 00H, USB Specification Rev. 1.1 specifies 29H. Returned value in bytes. Feature selector value, see Table 9. Downstream port identifier: 1 to N with N = number of enabled ports (2 to 5).
Table 9:
Port feature selectors Value (Hex) 00 01 02 03 04 08 09 10 11 12 13 14 Set feature not used not used suspends a port not used resets and enables a port powers on a port not used not used not used not used not used not used Clear feature not used disables a port resumes a port not used not used powers off a port not used clears port connection change bit clears port enable change bit clears port suspend change bit clears port overcurrent change bit clears port reset change bit
Feature selector name PORT_CONNECTION PORT_ENABLE PORT_SUSPEND PORT_OVERCURRENT PORT_RESET PORT_POWER PORT_LOW_SPEED C_PORT_CONNECTION C_PORT_ENABLE C_PORT_SUSPEND C_PORT_OVERCURRENT C_PORT_RESET
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10.3 Descriptors
The ISP1123 hub controller supports the following standard USB descriptors:
* * * * * *
Device Configuration Interface Endpoint Hub String.
Table 10: Device descriptor Values in square brackets are optional. Offset (bytes) 0 1 2 4 5 6 7 8 Field name bLength bDescriptorType bcdUSB bDeviceClass bDeviceSubClass bDeviceProtocol bMaxPacketSize0 idVendor Size (bytes) 1 1 2 1 1 1 1 2 Value (Hex) 12 01 10, 01 09 00 00 40 CC, 04 Comments descriptor length = 18 bytes type = DEVICE
USB Specification Rev. 1.1
HUB_CLASSCODE packet size = 64 bytes Philips Semiconductors vendor ID (04CC); can be customized using an external EEPROM (see Table 23) ISP1123 product ID; can be customized using an external EEPROM (see Table 23) device release 1.0; silicon revision increments this value no manufacturer string (default) manufacturer string enabled (using an external EEPROM) no product string (default) product string enabled (using an external EEPROM) no serial number string one configuration
10
idProduct
2
23, 11
12 14
bcdDevice iManufacturer
2 1
00, 01 00 [01]
15
iProduct
1
00 [02]
16 17
iSerialNumber bNumConfigurations
1 1
00 01
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Table 11: Configuration descriptor Values in square brackets are optional. Offset (bytes) 0 1 2 4 5 6 7 8 Field name bLength bDescriptorType wTotalLength bNumInterfaces bConfigurationValue iConfiguration bmAttributes MaxPower [2] Size (bytes) 1 1 2 1 1 1 1 1 Value (Hex) 09 02 19, 00 01 01 00 E0 A0 32 [00] [FA]
[1] [2] Selected by input SP/BP. Value in units of 2 mA.
Comments descriptor length = 9 bytes type = CONFIGURATION total length of configuration, interface and endpoint descriptors (25 bytes) one interface configuration value = 1 no configuration string self-powered with remote wake-up [1] bus-powered with remote wake-up [1] 100 mA (default) 0 mA (using an external EEPROM) 500 mA (using an external EEPROM)
Table 12: Interface descriptor Offset (bytes) 0 1 2 3 4 5 6 7 8 Field name bLength bDescriptorType bInterfaceNumber bAlternateSetting bNumEndpoints bInterfaceClass bInterfaceSubClass bInterfaceProtocol bInterface Size (bytes) 1 1 1 1 1 1 1 1 1 Value (Hex) 09 04 00 01 01 09 00 00 00 Comments descriptor length = 9 bytes type = INTERFACE no alternate setting status change (interrupt) endpoint HUB_CLASSCODE no class-specific protocol no interface string
Table 13: Endpoint descriptor Offset (bytes) 0 1 2 3 4 6 Field name bLength bDescriptorType bEndpointAddress bmAttributes wMaxPacketSize bInterval Size (bytes) 1 1 1 1 2 1 Value (Hex) 07 05 81 03 01, 00 FF Comments descriptor length = 7 bytes type = ENDPOINT endpoint 1, direction: IN interrupt endpoint packet size = 1 byte polling interval (255 ms)
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Table 14: Hub descriptor Values in square brackets are optional. Offset (bytes) 0 1 2 3 Field name bDescLength bDescriptorType bNbrPorts wHubCharacteristics Size (bytes) 1 1 1 2 Value (Hex) 09 29 Comments descriptor length = 9 bytes type = HUB
05 to 02 number of enabled downstream ports; selectable by DP/DM strapping 0D, 00 individual power switching [1], overcurrent protection active (modes 0, 1, 3, 4, 5, 7), hub is part of a compound device individual power switching [1], no overcurrent protection (modes 2, 6) [2], hub is part of a compound device 100 ms (default; modes 0, 1, 2, 4, 5, 6) 0 ms (default; modes 3, 7) 500 ms (using an external EEPROM; modes 0, 1, 2, 4, 5, 6); see Table 23 maximum hub controller current (100 mA) port 1 is non-removable must be all ones for compatibility with USB Specification Rev. 1.0
15, 00
5
bPwrOn2PwrGood [3]
1
32 00 [FA]
6 7 8
[1] [2] [3]
bHubContrCurrent DeviceRemovable PortPwrCtrlMask
1 1 1
64 02 FF
ISP1123 always reports power management status on an individual basis, even for ganged/global modes. This is compliant with USB Specification Rev. 1.1. Condition with no overcurrent detection is reported to the host. Value in units of 2 ms.
Table 15: String descriptors String descriptors are optional and therefore disabled by default; they can be enabled through an external EEPROM. Offset (bytes) 0 1 2 0 1 2 Field name Size (bytes) 1 1 2 1 1 44 Value (Hex) 04 03 09, 04 2E 03 UC [1] Comments
String descriptor (0): language ID string bLength bDescriptorType bString bLength bDescriptorType bString descriptor length = 4 bytes type = STRING LANGID code zero descriptor length = 46 bytes type = STRING "Philips Semiconductors"
String descriptor (1): manufacturer string
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Table 15: String descriptors...continued String descriptors are optional and therefore disabled by default; they can be enabled through an external EEPROM. Offset (bytes) 0 1 2
[1]
Field name
Size (bytes) 1 1 14
Value (Hex) 10 03 UC [1]
Comments
String descriptor (2): product string bLength bDescriptorType bString
Unicode encoded string.
descriptor length = 16 bytes type = STRING "ISP1122"
10.4 Hub responses
This section describes the hub responses to requests from the USB host. 10.4.1 Get device status The hub returns 2 bytes, see Table 16.
Table 16: Get device status response Bit # 0 1 2 to 15 Function self-powered remote wake-up reserved Value 0 1 0 1 0 Description bus-powered self-powered no remote wake-up remote wake-up enabled -
10.4.2
Get configuration The hub returns 1 byte, see Table 17.
Table 17: Get configuration response Bit # 0 1 to 7 Function configuration value reserved Value 0 1 0 Description device not configured device configured -
10.4.3
Get interface status The hub returns 2 bytes, see Table 18.
Table 18: Get interface status response Bit # 0 to 15 Function reserved Value 0 Description -
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10.4.4
Get hub status The hub returns 4 bytes, see Table 19.
Table 19: Get hub status response Bit # 0 1 2 to 15 16 17 18 to 31 Function local power source overcurrent indicator reserved local power status change Value 0 1 0 1 0 0 1 overcurrent indicator change 0 1 reserved 0 Description local power supply good local power supply lost no overcurrent condition hub overcurrent condition detected no change in local power status local power status changed no change in overcurrent condition overcurrent condition changed -
10.4.5
Get port status The hub returns 4 bytes. The first 2 bytes contain the port status bits (wPortStatus, see Table 20). The last 2 bytes hold the port status change bits (wPortChange, see Table 21).
Table 20: Get port status response (wPortStatus) Bit # 0 1 2 3 4 5 to 7 8 9 10 to 15 Function current connect status port enabled/disabled suspend overcurrent indicator reset reserved port power low-speed device attached reserved Value 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 0 Description no device present device present on this port port disabled port enabled port not suspended port suspended no overcurrent condition overcurrent condition detected reset not asserted reset asserted port powered off port power on full-speed device attached low-speed device attached -
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Table 21: Get port status response (wPortChange) Bit # 0 1 2 3 4 5 to 15 Function connect status change port enabled/disabled change suspend change Value 0 1 0 1 0 1 overcurrent indicator change 0 1 reset change reserved 0 1 0 Description no change in current connect status current connect status changed no port error port disabled by a port error no change in suspend status resume complete no change in overcurrent status overcurrent indicator changed no change in reset status reset complete -
10.4.6
Get configuration descriptor The hub returns 25 bytes containing the configuration descriptor (9 bytes, see Table 11), the interface descriptor (9 bytes, see Table 12) and the endpoint descriptor (7 bytes, see Table 13).
10.4.7
Get device descriptor The hub returns 18 bytes containing the device descriptor, see Table 10.
10.4.8
Get hub descriptor The hub returns 9 bytes containing the hub descriptor, see Table 14.
10.4.9
Get string descriptor (0) The hub returns 4 bytes containing the language ID, see Table 15.
10.4.10
Get string descriptor (1) The hub returns 46 bytes containing the manufacturer name, see Table 15.
10.4.11
Get string descriptor (2) The hub returns 16 bytes containing the product name, see Table 15.
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11. I2C-bus interface
A simple I2C-bus interface is provided in the ISP1123 to read customized vendor ID, product ID and some other configuration bits from an external EEPROM. The interface supports single master operation at a nominal bus speed of 93.75 kHz. The I2C-bus interface is intended for bidirectional communication between ICs via two serial bus wires, SDA (data) and SCL (clock). Both lines are driven by open-drain circuits and must be connected to the positive supply voltage via pull-up resistors.
11.1 Protocol
The I2C-bus protocol defines the following conditions:
* * * *
Bus free: both SDA and SCL are HIGH START: a HIGH-to-LOW transition on SDA, while SCL is HIGH STOP: a LOW-to-HIGH transition on SDA, while SCL is HIGH Data valid: after a START condition, data on SDA are stable during the HIGH period of SCL; data on SDA may only change while SCL is LOW.
Each device on the I2C-bus has a unique slave address, which the master uses to select a device for access. The master starts a data transfer using a START condition and ends it by generating a STOP condition. Transfers can only be initiated when the bus is free. The receiver must acknowledge each byte by means of a LOW level on SDA during the ninth clock pulse on SCL. For detailed information please consult The I2C-bus and how to use it., order number 9398 393 40011.
11.2 Hardware connections
Via the I2C-bus interface the ISP1123 can be connected to an external EEPROM (PCF8582 or equivalent). The hardware connections are shown in Figure 6. The SCL and SDA pins are multiplexed with pins OPTION and INDV respectively.
idth
VDD
VDD
RP OPTION/SCL INDV/SDA I2C-bus
RP SCL SDA A0 A1
PCF8582 A2 ISP1123
USB HUB EEPROM or equivalent
MBL081
Fig 6. EEPROM connection diagram.
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The slave address which ISP1123 uses to access the EEPROM is 1010000B. Page mode addressing is not supported, so pins A0, A1 and A2 of the EEPROM must be connected to GND (logic 0).
11.3 Data transfer
When the ISP1123 is reset, the I2C-bus interface tries to read 6 bytes of configuration data from an external EEPROM. If no response is detected, the levels on inputs SDA and SCL are interpreted as INDV and OPTION to select the operating mode (see Table 4). The data in the EEPROM memory are organized as shown in Table 22.
Table 22: EEPROM organization Address (Hex) 00 01 02 03 04 05
[1] [2]
Default value (Hex) CC 04 23 11 AA
Contents idVendor [1] (lower byte) idVendor [1] (upper byte) idProduct [2] (lower byte) idProduct [2] (upper byte) configuration bits C7 to C0; see Table 23 signature
Vendor ID code in the Device descriptor, see Table 10. Product ID code in the Device descriptor, see Table 10.
Table 23: Configuration bits Bit C0 C1 C2 C3 C4 Function OPTION INDV reserved PwrOn2PwrGood [2] string descriptor enable Value (Bin) Description
see Table 4 "Mode selection" see Table 4 "Mode selection" 0 [1] 0 [1] 1 0 [1] 1 must always be programmed to logic 0 100 ms (bPwrOn2PwrGood = 32H) 500 ms (bPwrOn2PwrGood = FAH) string descriptors disabled string descriptors enabled (strings: "Philips Semiconductors", "ISP1122") internal analog overcurrent detection circuit disabled; overcurrent pins OCn function as digital inputs (TTL level) internal analog overcurrent detection circuit enabled 100 mA (MaxPower = 32H) 500 mA (MaxPower = FAH) 0 mA (MaxPower = 00H)
C5
internal analog overcurrent detection enable
0
1 [1] C7, C6 MaxPower [3] 00 [1] 01 1X
[1] [2] [3]
Default value at reset if no external EEPROM is present. Modifies the Hub Descriptor field `bPwrOn2PwrGood', see Table 14. Modifies the Hub Descriptor field `MaxPower', see Table 14.
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12. Hub power modes
USB hubs can either be self-powered or bus-powered. Self-powered -- Self-powered hubs have a 5 V local power supply on board which provide power to the hub and the downstream ports. The USB Specification Rev. 1.1 requires that these hubs limit the current to 500 mA per downstream port and report overcurrent conditions to the host. The hub may optionally draw 100 mA from the USB supply (VBUS) to power the interface functions (hybrid-powered). Bus-powered -- Bus-powered hubs obtain all power from the host or an upstream self-powered hub. The maximum current is 100 mA per downstream port. Current limiting and reporting of overcurrent conditions are both optional. Power switching of downstream ports can be done individually or ganged, where all ports are switched simultaneously with one power switch. The ISP1123 supports both modes, which can be selected using input INDV (see Table 4).
12.1 Voltage drop requirements
12.1.1 Self-powered hubs Self-powered hubs are required to provide a minimum of 4.75 V to its output port connectors at all legal load conditions. To comply with Underwriters Laboratory Inc. (UL) safety requirements, the power from any port must be limited to 25 W (5 A at 5 V). Overcurrent protection may be implemented on a global or individual basis. Assuming a 5 V 3% power supply the worst case supply voltage is 4.85 V. This only allows a voltage drop of 100 mV across the hub printed-circuit board (PCB) to each downstream connector. This includes a voltage drop across:
* * * *
Power supply connector Hub PCB (power and ground traces, ferrite beads) Power switch (FET on-resistance) Overcurrent sense device.
PCB resistance and power supply connector resistance may cause a drop of 25 mV, leaving only 75 mV as the voltage drop allowed across the power switch and overcurrent sense device. The individual voltage drop components are shown in Figure 7.
handbook, full pagewidth
5V + POWER SUPPLY 3% regulated -
4.85 V(min)
voltage drop 75 mV
voltage drop 25 mV hub board (1) resistance
4.75 V(min)
VBUS D+ D- GND SHIELD
MBL088
low-ohmic PMOS switch ISP1123 power switch
downstream port connector
(1) Includes PCB traces, ferrite beads, etc.
Fig 7. Typical voltage drop components in self-powered mode using individual overcurrent detection.
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In case of global overcurrent detection an increased voltage drop is needed for the overcurrent sense device (in this case a low-ohmic resistor). This can be realized by using a special power supply of 5.1 V 3%, as shown in Figure 8.
handbook, full pagewidth
5.1 V KICK-UP + POWER SUPPLY 3% regulated -
voltage drop 4.95 V(min) 100 mV low-ohmic sense resistor for overcurrent detection
voltage drop 75 mV
voltage drop 25 mV 4.75 V(min) hub board (1) resistance
VBUS D+ D- GND SHIELD
MBL089
low-ohmic PMOS switch ISP1123 power switch
downstream port connector
(1) Includes PCB traces, ferrite beads, etc.
Fig 8. Typical voltage drop components in self-powered mode using global overcurrent detection.
12.1.2
Bus-powered hubs Bus-powered hubs are guaranteed to receive a supply voltage of 4.5 V at the upstream port connector and must provide a minimum of 4.4 V to the downstream port connectors. The voltage drop of 100 mV across bus-powered hubs includes:
* Hub PCB (power and ground traces, ferrite beads) * Power switch (FET on-resistance) * Overcurrent sense device.
The PCB resistance may cause a drop of 25 mV, which leaves 75 mV for the power switch and overcurrent sense device. The voltage drop components are shown in Figure 9. For bus-powered hubs overcurrent protection is optional. It may be implemented for all downstream ports on a global or individual basis.
handbook, full pagewidth
VBUS upstream port connector D+ D- GND SHIELD
4.50 V(min)
voltage drop 75 mV
voltage drop 25 mV hub board (1) resistance
4.40 V(min)
VBUS D+ D- GND SHIELD
MBL090
low-ohmic PMOS switch ISP1123 power switch
downstream port connector
(1) Includes PCB traces, ferrite beads, etc.
Fig 9. Typical voltage drop components in bus-powered mode (no overcurrent detection).
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13. Overcurrent detection
The ISP1123 has an analog overcurrent detection circuit for monitoring downstream port lines. This circuit automatically reports an overcurrent condition to the host and turns off the power to the faulty port. The host must reset the condition flag. Pins OC1 to OC5/GOC are used for individual port overcurrent detection. Pin OC5/GOC can also be used for global overcurrent detection. This is controlled by input INDV (see Table 4). The overcurrent detection circuit can be switched off using an external EEPROM (see Table 23). In this case, the overcurrent pins OCn function as logic inputs (TTL level).
13.1 Overcurrent circuit description
The integrated overcurrent detection circuit of ISP1123 senses the voltage drop across the power switch or an extra low-ohmic sense resistor. When the port draws too much current, the voltage drop across the power switch exceeds the trip voltage threshold (Vtrip). The overcurrent circuit detects this and switches off the power switch control signal after a delay of 15 ms (ttrip). This delay acts as a `debounce' period to minimize false tripping, especially during the inrush current produced by `hot plugging' of a USB device.
13.2 Power switch selection
From the voltage drop analysis given in Figure 7, Figure 8 and Figure 9, the power switch has a voltage drop budget of 75 mV. For individual self-powered mode, the current drawn per port can be up to 500 mA. Thus the power switch should have maximum on-resistance of 150 m. If the voltage drop due to the hub board resistance can be minimized, the power switch can have more voltage drop budget and therefore a higher on-resistance. Power switches with a typical on-resistance of around 100 m fit into this application. The ISP1123 overcurrent detection circuit has been designed with a nominal trip voltage (Vtrip) of 85 mV. This gives a typical trip current of approximately 850 mA for a power switch with an on-resistance of 100 m1.
13.3 Tuning the overcurrent trip voltage
The ISP1123 trip voltage can optionally be adjusted through external components to set the desired trip current. This is done by inserting tuning resistors at pins SP/BP or OCn (see Figure 10). Rtu tunes up the trip voltage Vtrip and Rtd tunes it down according to Equation 1. V trip = V trip ( intrinsic ) + I ref R tu - I OC R td with Iref(nom) = 5 A and IOC(nom) = 0.5 A. (1)
1.
The following PMOS power switches have been tested to work well with the ISP1123: Philips PHP109, Vishay Siliconix Si2301DS, Fairchild FDN338P.
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handbook, halfpage
low-ohmic PMOS switch Iref Rtu IOC Rtd
handbook, halfpage
low-ohmic PMOS switch IOC Rtd
VCC
VBUS
VCC
SP/BP
OCn
VCC
SP/BP
OCn
ISP1123
ISP1123
MBL079
MBL080
Iref(nom) = 5 A IOC(nom) = 0.5 A
IOC(nom) = 0.5 A
a.
Self-powered mode.
b.
Bus-powered mode.
Fig 10. Tuning the overcurrent trip voltage.
13.4 Reference circuits
Some typical examples of port power switching and overcurrent detection modes are given in Figure 11 to Figure 14. The RC circuit (10 k and 0.1 F) around the PMOS switch provides for soft turn-on. The series resistor connecting the SP/BP pin to VCC tunes up the overcurrent trip voltage slightly (see Figure 10). In the schematic diagram the resistor separates the net names for pins VCC and SP/BP. This allows an automatic router to use a wide trace for VCC and a narrow trace to connect pin SP/BP.
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5V + POWER SUPPLY - 3%
+4.85 V(min) 0.1 F 10 k
low-ohmic PMOS switch 1
downstream ports ferrite bead 120 F VBUS +4.75 V (min) D+ D- GND SHIELD
1
330 k (5x) 0.1 F 10 k
low-ohmic PMOS switch 2
ferrite bead 120 F VBUS +4.75 V (min) D+ D- GND SHIELD
2
+4.85 V(min) VCC GND PSW1/GL1 PSW2/GL2 PSW3/GL3 100 to 1 k PSW4/GL4 PSW5/GL5/GPSW 0.1 F INDV SP/BP OPTION 0.1 F 10 k OC1 OC2 OC3 OC4 OC5/GOC 10 k 0.1 F 10 k
low-ohmic PMOS switch 3
ferrite bead 120 F VBUS +4.75 V (min) D+ D- GND SHIELD
3
low-ohmic PMOS switch 4
ferrite bead 120 F VBUS +4.75 V (min) D+ D- GND SHIELD
4
low-ohmic PMOS switch 5
ferrite bead 120 F VBUS +4.75 V (min) D+ D- GND SHIELD
MBL084
ISP1123
5
Power switches 1 to 5 are low-ohmic PMOS devices as specified in Section 13.2.
Fig 11. Mode 5: self-powered hub; individual port power switching; individual overcurrent detection.
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downstream ports 5.1 V KICK-UP + POWER SUPPLY - 3% +4.95 V(min) ferrite bead 120 F VBUS +4.75 V (min) D+ D- GND SHIELD ferrite bead 120 F VBUS +4.75 V (min) D+ D- GND SHIELD 0.1 F 10 k PSW5/GL5/GPSW 120 F INDV SP/BP OPTION ferrite bead 120 F OC1 OC2 ferrite bead OC3 OC4 OC5/GOC 120 F VBUS +4.75 V (min) D+ D- GND SHIELD
MBL085
low-ohmic sense resistor for overcurrent detection 330 k
1
+4.95 V(min) VCC GND PSW2/GL2 PSW3/GL3 100 to 1 k PSW4/GL4 PSW1/GL1
low-ohmic PMOS switch
2
ferrite bead VBUS +4.75 V (min) D+ D- GND SHIELD
3
ISP1123
VBUS +4.75 V (min) D+ D- GND SHIELD
4
5
Power switch is low-ohmic PMOS device as specified in Section 13.2.
Fig 12. Mode 1: self-powered hub; ganged port power switching; global overcurrent detection.
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upstream port VBUS D+ D- GND SHIELD 330 k (4x) +4.50 V(min) 0.1 F 10 k
low-ohmic PMOS switch 1
downstream ports ferrite bead 120 F VBUS +4.40 V (min) D+ D- GND SHIELD
1
low-ohmic PMOS switch PSW1/GL1 PSW2/GL2 PSW3/GL3 PSW4/GL4 PSW5/GL5/GPSW 0.1 F 10 k low-ohmic PMOS switch 3 0.1 F 10 k 2
ferrite bead 120 F VBUS +4.40 V (min) D+ D- GND SHIELD ferrite bead 120 F VBUS +4.40 V (min) D+ D- GND SHIELD
VCC GND
2
3
INDV SP/BP OPTION 0.1 F 10 k
low-ohmic PMOS switch 4
ferrite bead 120 F VBUS +4.40 V (min) D+ D- GND SHIELD
MBL086
4
ISP1123
OC1 OC2 OC3 OC4 OC5/GOC
Power switches 1 to 4 are low-ohmic PMOS devices as specified in Section 13.2.
Fig 13. Mode 4: bus-powered hub; individual port power switching; individual overcurrent detection.
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upstream port VBUS D+ D- GND SHIELD 330 k ferrite bead 120 F low-ohmic PMOS switch 0.1 F 10 k PSW5/GL5/GPSW INDV SP/BP OPTION ferrite bead 120 F ferrite bead 120 F +4.50 V(min) ferrite bead 120 F
downstream ports VBUS +4.40 V (min) D+ D- GND SHIELD
1
VCC GND
PSW1/GL1 PSW2/GL2 PSW3/GL3 PSW4/GL4
VBUS +4.40 V (min) D+ D- GND SHIELD
2
VBUS +4.40 V (min) D+ D- GND SHIELD
3
ISP1123
VBUS +4.40 V (min) D+ D- GND SHIELD
4
OC1 OC2 OC3 OC4 OC5/GOC
MBL087
Power switch is low-ohmic PMOS device as specified in Section 13.2.
Fig 14. Mode 0: bus-powered hub; ganged port power switching; global overcurrent detection.
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14. Limiting values
Table 24: Absolute maximum ratings In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VCC VI Ilatchup Vesd Tstg Ptot
[1] [2] [3]
Parameter supply voltage input voltage latchup current electrostatic discharge voltage storage temperature total power dissipation
Conditions
Min -0.5 -0.5
Max +6.0 VCC + 0.5 200 4000 [3] +150 95
Unit V V mA V C mW
VI < 0 or VI > VCC ILI < 15 A
[1] [2]
-60 -
Equivalent to discharging a 100 pF capacitor via a 1.5 k resistor (Human Body Model). Values are given for device only; in-circuit Vesd(max) = 8000 V. For open-drain pins Vesd(max) = 2000 V.
Table 25: Recommended operating conditions Symbol VCC VI VI(AI/O) VO(od) Tamb Parameter supply voltage input voltage input voltage on analog I/O pins (D+/D-) open-drain output pull-up voltage operating ambient temperature Conditions Min 4.0 0 0 0 -40 Max 5.5 5.5 3.6 5.5 +85 Unit V V V V C
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15. Static characteristics
Table 26: Static characteristics; supply pins VCC = 4.0 to 5.5 V; VGND = 0 V; Tamb = -40 to +85 C; unless otherwise specified. Symbol Vreg(3.3) ICC ICC(susp) Parameter regulated supply voltage operating supply current suspend supply current 1.5 k pull-up on upstream port D+ (pin DP0) no pull-up on upstream port D+ (pin DP0)
[1] In `suspend' mode the minimum voltage is 2.7 V.
Conditions
Min 3.0 [1] -
Typ 3.3 18 -
Max 3.6 270 80
Unit V mA A A
Table 27: Static characteristics: digital pins VCC = 4.0 to 5.5 V; VGND = 0 V; Tamb = -40 to +85 C; unless otherwise specified. Symbol Input levels VIL VIH Vth(LH) Vth(HL) Vhys Output levels VOL LOW-level output voltage (open drain outputs) IOL = 6 mA IOL = 20 A 0.4 0.1 1 1 V V A A LOW-level input voltage HIGH-level input voltage positive-going threshold voltage negative-going threshold voltage hysteresis voltage 2.0 1.4 0.9 0.4 0.8 1.9 1.5 0.7 V V V V V Parameter Conditions Min Typ Max Unit
Schmitt trigger inputs
Leakage current ILI IOZ input leakage current OFF-state output current Open-drain outputs
Table 28: Static characteristics: overcurrent sense pins VCC = 4.0 to 5.5 V; VGND = 0 V; Tamb = -40 to +85 C; unless otherwise specified. Symbol Vtrip
[1] [2]
Parameter overcurrent detection trip voltage on OCn pins
Conditions V = VCC - VOCn V = VSP/BP - VOCn
[1] [2]
Min 65
Typ 85
Max 105
Unit mV
Bus-powered mode. Self-powered or hybrid-powered mode.
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Table 29: Static characteristics: analog I/O pins (D+, D-) [1] VCC = 4.0 to 5.5 V; VGND = 0 V; Tamb = -40 to +85 C; unless otherwise specified. Symbol Input levels VDI VCM VIL VIH Output levels VOL VOH ILZ Capacitance CIN Resistance ZDRV [2] ZINP Termination VTERM [3] termination voltage for upstream port pull-up (RPU) 3.0 [4] 3.6 V driver output impedance input impedance steady-state drive 28 10 44 M transceiver capacitance pin to GND 20 pF LOW-level output voltage HIGH-level output voltage OFF-state leakage current RL = 1.5 k to +3.6V RL = 15 k to GND 2.8 0.3 3.6 10 V V A differential input sensitivity differential common mode voltage LOW-level input voltage HIGH-level input voltage |VI(D+) - VI(D-)| includes VDI range 0.2 0.8 2.0 2.5 0.8 V V V V Parameter Conditions Min Typ Max Unit
Leakage current
[1] [2] [3] [4]
D+ is the USB positive data pin (DPn); D- is the USB negative data pin (DMn). Includes external resistors of 20 1% on both D+ and D-. This voltage is available at pin Vreg(3.3). In `suspend' mode the minimum voltage is 2.7 V.
16. Dynamic characteristics
Table 30: Dynamic characteristics VCC = 4.0 to 5.5 V; VGND = 0 V; Tamb = -40 to +85 C; unless otherwise specified. Symbol Reset tW(RESET) pulse width on input RESET crystal oscillator running crystal oscillator stopped Crystal oscillator fXTAL
[1]
Parameter
Conditions
Min 10 -
Typ 2 [1] 6
Max -
Unit s ms MHz
crystal frequency
Dependent on the crystal oscillator start-up time.
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Table 31: Dynamic characteristics: overcurrent sense pins VCC = 4.0 to 5.5 V; VGND = 0 V; Tamb = -40 to +85 C; unless otherwise specified. Symbol ttrip Parameter Conditions
[1]
Min -
Typ -
Max 15
Unit ms
overcurrent trip response time see Figure 15 from OCn LOW to PSWn HIGH
Operating modes 0, 1, 4 and 5; see Table 4.
[1]
Table 32: Dynamic characteristics: analog I/O pins (D+, D-); full-speed mode [1] VCC = 4.0 to 5.5 V; VGND = 0 V; Tamb = -40 to +85 C; CL = 50 pF; RPU = 1.5 k on D+ to VTERM.; unless otherwise specified. Symbol tFR tFF FRFM VCRS tDJ1 tDJ2 tFEOPT tFDEOP Parameter rise time fall time differential rise/fall time matching (tFR/tFF) output signal crossover voltage source differential jitter for consecutive transitions source differential jitter for paired transitions source EOP width see Figure 16 see Figure 16 see Figure 17 Conditions CL = 50 pF; 10 to 90% of |VOH - VOL| CL = 50 pF; 10 to 90% of |VOH - VOL|
[2]
Min 4 4 90 1.3 -3.5 -4 160 -2
Typ -
Max 20 20 111.11 2.0 +3.5 +4 175 +5
Unit ns ns % V ns ns ns ns
Driver characteristics
[2] [3]
Data source timing
[2] [3]
[2] [3]
[3] [3]
source differential data-to-EOP see Figure 17 transition skew receiver data jitter tolerance for see Figure 18 consecutive transitions receiver data jitter tolerance for see Figure 18 paired transitions receiver SE0 width accepted as EOP; see Figure 17
Receiver timing tJR1 tJR2 tFEOPR tFST
[3]
-18.5 -9 82 -
-
+18.5 +9 14
ns ns ns ns
[3]
[3]
width of SE0 during differential rejected as EOP; transition see Figure 19 hub differential data delay (without cable) data bit width distortion after SOP hub EOP output width skew see Figure 20; CL = 0 pF see Figure 20
[3]
Hub timing (downstream ports configured as full-speed) tFHDD tFSOP tFEOPD tFHESK
[1] [2] [3]
[3]
-5 0 -15
-
44 +5 15 +15
ns ns ns ns
[3]
hub EOP delay relative to tHDD see Figure 21 see Figure 21
[3] [3]
Test circuit; see Figure 23. Excluding the first transition from Idle state. Characterized only, not tested. Limits guaranteed by design.
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Table 33: Dynamic characteristics: analog I/O pins (D+, D-); low-speed mode [1] VCC = 4.0 to 5.5 V; VGND = 0 V; Tamb = -40 to +85 C; CL = 50 pF; RPU = 1.5 k on D- to VTERM; unless otherwise specified. Symbol tLR tLF LRFM VCRS tLHDD tLSOP tLEOPD tLHESK
[1] [2] [3]
Parameter rise time fall time differential rise/fall time matching (tLR/tLF) output signal crossover voltage hub differential data delay data bit width distortion after SOP hub EOP output width skew
Conditions CL = 200 to 600 pF; 10 to 90% of |VOH - VOL| CL = 200 to 600 pF; 10 to 90% of |VOH - VOL|
[2]
Min 75 75 80 1.3 [3]
Typ -
Max 300 300 125 2.0 300 +60 200 +300
Unit ns ns % V ns ns ns ns
Driver characteristics
[2] [3]
Hub timing (downstream ports configured as low-speed) see Figure 20 see Figure 20 -60 0 -300
hub EOP delay relative to tHDD see Figure 21 see Figure 21
[3] [3]
Test circuit: see Figure 23. Excluding the first transition from Idle state. Characterized only, not tested. Limits guaranteed by design.
VCC handbook, halfpage overcurrent input 0V ttrip VCC power switch output 0V
MBL032
Vtrip
Overcurrent input: OCn; power switch output: PSWn. Reference voltage for overcurrent sensing: VCC (bus-powered mode) or VSP/BP (self-powered mode).
Fig 15. Overcurrent trip response timing.
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handbook, full pagewidth TPERIOD
+3.3 V crossover point differential data lines crossover point crossover point
0V consecutive transitions N x TPERIOD + t DJ1 paired transitions N x TPERIOD + t DJ2
MGR870
TPERIOD is the bit duration corresponding with the USB data rate.
Fig 16. Source differential data jitter.
TPERIOD handbook, full pagewidth +3.3 V crossover point differential data lines crossover point extended
0V differential data to SE0/EOP skew N x TPERIOD + t DEOP source EOP width: t EOPT receiver EOP width: t EOPR
MGR776
TPERIOD is the bit duration corresponding with the USB data rate. Full-speed timing symbols have a subscript prefix `F', low-speed timings a prefix `L'.
Fig 17. Source differential data-to-EOP transition skew and EOP width.
handbook, full pagewidth TPERIOD
+3.3 V differential data lines
0V tJR consecutive transitions N x TPERIOD + t JR1 paired transitions N x TPERIOD + t JR2 tJR1 tJR2
MGR871
TPERIOD is the bit duration corresponding with the USB data rate.
Fig 18. Receiver differential data jitter.
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handbook, halfpage
tFST
+3.3 V differential data lines VIH(min)
0V
MGR872
Fig 19. Receiver SE0 width tolerance.
+3.3 V handbook, full pagewidth upstream differential data lines 0V hub delay downstream t HDD +3.3 V downstream differential data lines 0V
MGR777
crossover point
downstream differential data
crossover point
hub delay upstream t HDD
crossover point
upstream differential data
crossover point
(A) downstream hub delay SOP distortion: t SOP = t HDD (next J) - t HDD(SOP)
(B) upstream hub delay
Full-speed timing symbols have a subscript prefix `F', low-speed timings a prefix `L'.
Fig 20. Hub differential data delay and SOP distortion.
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+3.3 pagewidth handbook, fullV upstream differential data lines 0V t EOP- +3.3 V downstream differential data lines 0V
MGR778
crossover point extended
downstream port
crossover point extended
t EOP+
t EOP-
t EOP+
crossover point extended
upstream end of cable
crossover point extended
(A) downstream EOP delay
(B) upstream EOP delay
EOP delay: t EOP = max (t EOP-, tEOP+) EOP delay relative to t HDD: t EOPD = t EOP - t HDD EOP skew: t HESK = t EOP+ - t EOP-
Full-speed timing symbols have a subscript prefix `F', low-speed timings a prefix `L'.
Fig 21. Hub EOP delay and EOP skew. Table 34: Dynamic characteristics: I2C-bus pins (SDA, SCL) VCC and Tamb within recommended operating range; VDD = +5 V; VSS = VGND ; VIL and VIH between VSS and VDD. Symbol fSCL tBUF tSU;STA tHD;STA tLOW tHIGH tr tf tSU;DAT tHD;DAT tVD;DAT tSU;STO Cb Parameter SCL clock frequency bus free time START condition set-up time hold time START condition SCL LOW time SCL HIGH time SCL and SDA rise time SCL and SDA fall time data set-up time data hold time SCL LOW to data out valid time STOP condition set-up time capacitive load for each bus line
fSCL = 164fXTAL. Rise time is determined by Cb and pull-up resistor value Rp (typ. 4.7 k).
[2]
Conditions fXTAL = 6 MHz
Min 0 4.7 250 4.0 4.7 4.0 250 0 4.0 -
Typ 93.75 [1] -
Max 100 1000 300 0.4 400
Unit kHz s ns s s s ns ns ns s s s pF
[1] [2]
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handbook, full pagewidth
SDA
t BUF
t LOW
tr
tf
t HD;STA
SCL P S t HD;STA t HD;STA t HIGH t SU;DAT S t SU;STA P t SU;STO
MGR779
Fig 22. I2C-bus timing.
17. Test information
The dynamic characteristics of the analog I/O ports (D+ and D-) as listed in Table 32 and Table 33, were determined using the circuit shown in Figure 23.
handbook, halfpage
test point 20 S1
Vreg(3.3) RPU 1.5 k
D.U.T. 15 k CL test S1
D-/LS closed D+/LS open D-/FS open D+/FS closed
MGR775
Load capacitance: CL = 50 pF (full-speed mode) CL = 200 pF or 600 pF (low-speed mode, minimum or maximum timing). Speed selection: full-speed mode (FS): 1.5 k pull-up resistor on D+ low-speed mode (LS): 1.5 k pull-up resistor on D-.
Fig 23. Load impedance for D+ and D- pins.
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18. Package outline
SO32: plastic small outline package; 32 leads; body width 7.5 mm SOT287-1
D
E
A X
c y HE vM A
Z 32 17
Q A2 A1 pin 1 index Lp 1 e bp 16 wM L detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.10 A1 0.3 0.1 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 0.02 0.01 c 0.27 0.18 0.011 0.007 D (1) 20.7 20.3 0.81 0.80 E (1) 7.6 7.4 0.30 0.29 e 1.27 0.050 HE 10.65 10.00 0.419 0.394 L 1.4 0.055 Lp 1.1 0.4 0.043 0.016 Q 1.2 1.0 0.047 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z (1) 0.95 0.55 0.037 0.022
0.012 0.096 0.004 0.086
8o 0o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT287-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-01-25 97-05-22
Fig 24. SO32 package outline.
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SDIP32: plastic shrink dual in-line package; 32 leads (400 mil)
SOT232-1
D seating plane
ME
A2 A
L
A1 c Z e b 32 17 b1 wM (e 1) MH
pin 1 index E
1
16
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 4.7 A1 min. 0.51 A2 max. 3.8 b 1.3 0.8 b1 0.53 0.40 c 0.32 0.23 D (1) 29.4 28.5 E (1) 9.1 8.7 e 1.778 e1 10.16 L 3.2 2.8 ME 10.7 10.2 MH 12.2 10.5 w 0.18 Z (1) max. 1.6
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT232-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-02-04
Fig 25. SDIP32 package outline.
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LQFP32: plastic low profile quad flat package; 32 leads; body 7 x 7 x 1.4 mm
SOT358-1
c
y X
24 25
17 16 ZE
A
e E HE wM bp pin 1 index 32 1 e bp D HD wM B vM B 8 ZD vM A 9 detail X L Lp A A2 A 1 (A 3)
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.60 A1 0.20 0.05 A2 1.45 1.35 A3 0.25 bp 0.4 0.3 c 0.18 0.12 D (1) 7.1 6.9 E (1) 7.1 6.9 e 0.8 HD 9.15 8.85 HE 9.15 8.85 L 1.0 Lp 0.75 0.45 v 0.2 w 0.25 y 0.1 Z D (1) Z E (1) 0.9 0.5 0.9 0.5 7 0o
o
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT358 -1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-12-19 97-08-04
Fig 26. LQFP32 package outline.
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19. Soldering
19.1 Introduction
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages (document order number 9398 652 90011). There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mount components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used.
19.2 Surface mount packages
19.2.1 Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 230 C. 19.2.2 Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results:
* Use a double-wave soldering method comprising a turbulent wave with high
upward pressure followed by a smooth laminar wave.
* For packages with leads on two sides and a pitch (e):
- larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end.
* For packages with leads on four sides, the footprint must be placed at a 45 angle
to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners.
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During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 19.2.3 Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
19.3 Through-hole mount packages
19.3.1 Soldering by dipping or by solder wave The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joints for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg(max)). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. 19.3.2 Manual soldering Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds.
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19.4 Package related soldering information
Table 35: Suitability of IC packages for wave, reflow and dipping soldering methods Mounting Through-hole mount Surface mount Package Soldering method Wave DBS, DIP, HDIP, SDIP, SIL suitable [2] BGA, LFBGA, SQFP, TFBGA HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS PLCC [4], SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO
[1]
Reflow [1] Dipping - suitable suitable suitable suitable suitable - - - - -
not suitable not suitable [3] suitable not recommended [6]
not recommended [4] [5] suitable
[2] [3]
[4] [5] [6]
All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. Wave soldering is only suitable for LQFP, QFP and TQFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
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20. Revision history
Table 36: Revision history Rev Date 01 19991005 CPCN Description Preliminary specification; initial version.
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21. Data sheet status
Datasheet status Objective specification Preliminary specification Product status Development Qualification Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
Product specification
Production
[1]
Please consult the most recently issued data sheet before initiating or completing a design.
22. Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
24. Licenses
Purchase of Philips I2C components Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
23. Disclaimers
Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors
25. Trademarks
ACPI -- is an open industry specification for PC power management, co-developed by Intel Corp., Microsoft. and Toshiba GoodLink -- is a trademark of Philips Electronics LazyClock -- is a trademark of Philips Electronics OnNow -- is a trademark of Microsoft SMBus -- is a bus specification for PC power management, developed by Intel Corp. based on the I2C-bus from Philips Electronics SoftConnect -- is a trademark of Philips Electronics
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USB compound hub
Philips Semiconductors - a worldwide company
Argentina: see South America Australia: Tel. +61 29 805 4455, Fax. +61 29 805 4466 Austria: Tel. +43 160 101, Fax. +43 160 101 1210 Belarus: Tel. +375 17 220 0733, Fax. +375 17 220 0773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Tel. +359 268 9211, Fax. +359 268 9102 Canada: Tel. +1 800 234 7381 China/Hong Kong: Tel. +852 2 319 7888, Fax. +852 2 319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Tel. +45 3 288 2636, Fax. +45 3 157 0044 Finland: Tel. +358 961 5800, Fax. +358 96 158 0920 France: Tel. +33 14 099 6161, Fax. +33 14 099 6427 Germany: Tel. +49 40 23 5360, Fax. +49 402 353 6300 Hungary: see Austria India: Tel. +91 22 493 8541, Fax. +91 22 493 8722 Indonesia: see Singapore Ireland: Tel. +353 17 64 0000, Fax. +353 17 64 0200 Israel: Tel. +972 36 45 0444, Fax. +972 36 49 1007 Italy: Tel. +39 02 67 52 2531, Fax. +39 02 67 52 2557 Japan: Tel. +81 33 740 5130, Fax. +81 3 3740 5057 Korea: Tel. +82 27 09 1412, Fax. +82 27 09 1415 Malaysia: Tel. +60 37 50 5214, Fax. +60 37 57 4880 Mexico: Tel. +9-5 800 234 7381 Middle East: see Italy Netherlands: Tel. +31 40 278 2785, Fax. +31 40 278 8399 New Zealand: Tel. +64 98 49 4160, Fax. +64 98 49 7811 Norway: Tel. +47 22 74 8000, Fax. +47 22 74 8341 Philippines: Tel. +63 28 16 6380, Fax. +63 28 17 3474 Poland: Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: Tel. +27 11 471 5401, Fax. +27 11 471 5398 South America: Tel. +55 11 821 2333, Fax. +55 11 829 1849 Spain: Tel. +34 33 01 6312, Fax. +34 33 01 4107 Sweden: Tel. +46 86 32 2000, Fax. +46 86 32 2745 Switzerland: Tel. +41 14 88 2686, Fax. +41 14 81 7730 Taiwan: Tel. +886 22 134 2865, Fax. +886 22 134 2874 Thailand: Tel. +66 27 45 4090, Fax. +66 23 98 0793 Turkey: Tel. +90 216 522 1500, Fax. +90 216 522 1813 Ukraine: Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: Tel. +381 11 62 5344, Fax. +381 11 63 5777
For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 272 4825
Internet: http://www.semiconductors.philips.com
(SCA65)
9397 750 06325
(c) Philips Electronics N.V. 1999. All rights reserved.
Preliminary specification
Rev. 01 -- 5 October 1999
48 of 49
Philips Semiconductors
ISP1123
USB compound hub
Contents
1 2 3 4 5 6 6.1 6.1.1 6.1.2 6.2 6.2.1 6.2.2 7 7.1 7.2 7.3 7.4 7.5 7.6 7.7 7.8 7.9 7.10 7.11 8 9 9.1 9.2 10 10.1 10.2 10.3 10.4 10.4.1 10.4.2 10.4.3 10.4.4 10.4.5 10.4.6 10.4.7 10.4.8 10.4.9 10.4.10 10.4.11 11 11.1 11.2 11.3 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 ISP1123D (SO32) and ISP1123NB (SDIP32) . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 ISP1123BD (LQFP32) . . . . . . . . . . . . . . . . . . . 6 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6 Functional description . . . . . . . . . . . . . . . . . . . 8 Analog transceivers . . . . . . . . . . . . . . . . . . . . . 8 Philips Serial Interface Engine (SIE). . . . . . . . . 9 Hub repeater. . . . . . . . . . . . . . . . . . . . . . . . . . . 9 End-of-frame timers . . . . . . . . . . . . . . . . . . . . . 9 General and individual port controller . . . . . . . . 9 GoodLink . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Bit clock recovery . . . . . . . . . . . . . . . . . . . . . . . 9 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . 9 PLL clock multiplier. . . . . . . . . . . . . . . . . . . . . 10 Overcurrent detection . . . . . . . . . . . . . . . . . . . 10 I2C-bus interface. . . . . . . . . . . . . . . . . . . . . . . 10 Modes of operation . . . . . . . . . . . . . . . . . . . . . 10 Endpoint descriptions . . . . . . . . . . . . . . . . . . . 11 Hub endpoint 0 (control) . . . . . . . . . . . . . . . . . 11 Hub endpoint 1 (interrupt). . . . . . . . . . . . . . . . 11 Host requests . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Standard requests . . . . . . . . . . . . . . . . . . . . . 12 Hub specific requests . . . . . . . . . . . . . . . . . . . 13 Descriptors . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Hub responses . . . . . . . . . . . . . . . . . . . . . . . . 18 Get device status . . . . . . . . . . . . . . . . . . . . . . 18 Get configuration . . . . . . . . . . . . . . . . . . . . . . 18 Get interface status. . . . . . . . . . . . . . . . . . . . . 18 Get hub status . . . . . . . . . . . . . . . . . . . . . . . . 19 Get port status . . . . . . . . . . . . . . . . . . . . . . . . 19 Get configuration descriptor . . . . . . . . . . . . . . 20 Get device descriptor . . . . . . . . . . . . . . . . . . . 20 Get hub descriptor . . . . . . . . . . . . . . . . . . . . . 20 Get string descriptor (0) . . . . . . . . . . . . . . . . . 20 Get string descriptor (1) . . . . . . . . . . . . . . . . . 20 Get string descriptor (2) . . . . . . . . . . . . . . . . . 20 I2C-bus interface . . . . . . . . . . . . . . . . . . . . . . . 21 Protocol. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Hardware connections . . . . . . . . . . . . . . . . . . 21 Data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . 22 12 12.1 12.1.1 12.1.2 13 13.1 13.2 13.3 13.4 14 15 16 17 18 19 19.1 19.2 19.2.1 19.2.2 19.2.3 19.3 19.3.1 19.3.2 19.4 20 21 22 23 24 25 Hub power modes . . . . . . . . . . . . . . . . . . . . . . Voltage drop requirements . . . . . . . . . . . . . . . Self-powered hubs . . . . . . . . . . . . . . . . . . . . . Bus-powered hubs . . . . . . . . . . . . . . . . . . . . . Overcurrent detection . . . . . . . . . . . . . . . . . . . Overcurrent circuit description . . . . . . . . . . . . Power switch selection . . . . . . . . . . . . . . . . . . Tuning the overcurrent trip voltage . . . . . . . . . Reference circuits . . . . . . . . . . . . . . . . . . . . . . Limiting values . . . . . . . . . . . . . . . . . . . . . . . . . Static characteristics . . . . . . . . . . . . . . . . . . . . Dynamic characteristics . . . . . . . . . . . . . . . . . Test information . . . . . . . . . . . . . . . . . . . . . . . . Package outline . . . . . . . . . . . . . . . . . . . . . . . . Soldering. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . Surface mount packages . . . . . . . . . . . . . . . . Reflow soldering . . . . . . . . . . . . . . . . . . . . . . . Wave soldering . . . . . . . . . . . . . . . . . . . . . . . . Manual soldering. . . . . . . . . . . . . . . . . . . . . . . Through-hole mount packages . . . . . . . . . . . . Soldering by dipping or by solder wave . . . . . Manual soldering. . . . . . . . . . . . . . . . . . . . . . . Package related soldering information . . . . . . Revision history . . . . . . . . . . . . . . . . . . . . . . . . Data sheet status . . . . . . . . . . . . . . . . . . . . . . . Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . Licenses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 23 23 24 25 25 25 25 26 31 32 33 39 40 43 43 43 43 43 44 44 44 44 45 46 47 47 47 47 47
(c) Philips Electronics N.V. 1999.
Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 5 October 1999 Document order number: 9397 750 06325


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